Host: Luis Hueso / Pablo Stoliar

A difficult but urgent challenge for condensed matter physicists is to develop alternative electronics beyond the present Si ones, which are now confronted a lethal problem called ?miniaturisation limit.? In 2020, a typical size of transistors reaches 10 nm which contains only about 10 carriers. This will decrease the switching energy smaller than the thermal noise limit (_100 kBT), and ?on/off? states are no more distinguished. The saviour of our fully electronics-depended society from the looming crisis ?fundamentally? is nothing but to use Mott insulators. Mott insulator is a material in which all the carriers are localised because of the strong electron correlations. Therefore, even in such a nm-scale of Mott insulator, more than 100,000 ?localised?  charges exist. They all are delocalized by applying electric field. Then, huge amount of itinerant carriers are suddenly created. Thus, the Mott FET is believed to have no worry of the miniaturisation limit. However, the fabrication of Mott FET has come up against a severe problem. Essentially, the Mott insulator behaves as an ionic crystal due to the charge localisation, and ionic defects can form quite easily. Hence, the Mott transition is not controlled straightforwardly by simply applying the gate electric field. This renders the Mott FET unsuitable for integration to the present solid-state electronics.  To overcome the defects problem, we have proposed an idea: inserting a thin organic insulator Parylene-C between the Mott insulator and the high-k gate insulator [1, 2] (Fig.1). Parylene-C is inert to any materials and does not damage the channel interface when deposited. We have examined this idea by using SrTiO3 as a channel material. Although SrTiO3 is not the Mott insulator, it is widely used as a substrate of preparing films of Mott insulators. Our FET has demonstrated to accumulate carriers to the order of 1014 cm?2 keepping the field effect mobility as high as 10 cm2/Vs even at room temperature. A brief history and background of the Mott FET research is given in this talk, and possible plans for the future practical Mott FET are also discussed.

 

References

[1] I. H. Inoue and Hisashi Shima, Japan Patent Number: 5522688, Date of Patent: 18th April, 2014.

[2] A. B. Eyvazov, I. H. Inoue, P. Stoliar, M. J. Rozenberg, C. Panagopoulos, Scientific Reports  3, 1721 (2013).

 

Brief Biography

Isao H. Inoue received BSc, MSc, and DSc degrees in Physics from the Univer- sity of Tokyo in 1990, 1992 and 1998, respectively. He became a tenure researcher of the Electrotechnical Laboratory (ETL) in 1992 and a senior researcher in 1999.  From 1999 to 2001, he was a visiting scholar at Cavendish Laboratory, University of Cambridge. In 2001, ETL was re-organized to the National Institute of Advanced Industrial Science and Technology (AIST); since then, he has been a senior researcher of AIST. He studied in a wide range of research field: from the high-energy spectroscopies and fermiology of strongly correlated materials to the development of the Mott transistor, ReRAM, and other electronic devices, which utilise functional oxides, where electron correlations play a crucial role.